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Sweet! IPv6 perfection. besides GPUs, does anyone have experience with any processors that support 128 natively?

gravypod 10y ago
Technically anyone with a modern Intel CPU has access to the SIMD instructions needed for using 128 bit registers. We probably won't see larger then 64bit bus/address access for some time as we don't need it currently.
justincormack 10y ago
Risc-V has a 128 bit design (as well as 32 and 64), although no one is currently implementing it.
Const-me 10y ago
PCs have a set of 128-bit registers for like 15 years, both Intel and AMD. For integer/fixed point math, the functionality is here since SSE2: https://en.wikipedia.org/wiki/SSE2 https://en.wikipedia.org/wiki/SSE2
- bluejekyll 10y ago
  I've not had a chance to do more than rely on my compiler to target those. I guess I should play with them more.
  - Const-me 10y ago
    A couple of advices for you then. Unless you’re planning to do reverse engineering, or planning to work on a compiler, learning assembler is mostly pointless. In most cases, real-world algorithms contain both vector code in the inner loops, and scalar code everywhere else. When coding assembler you need to use it for both, and assembler ain’t exactly user-friendly. Using C or C++ language with SSE intrinsics is the way to go. All modern compilers support them. Intel’s documentation is the best so far, but there’s no offline searchable version. I’ve created one: https://github.com/Const-me/IntelIntrinsics/releases https://github.com/Const-me/IntelIntrinsics/releases Memory layout is a king. You need to keep the input and output data SSE-friendly: aligned, dense, sequential access patterns are preferred. This could mean you need to [re]design some parts of your software specifically for SSE. There’re multiple generations of hardware. When writing manually-vectorized code, the compiler won’t tell you what CPUs it’ll run on. SSE2 is the most compatible. Here’s some statistics about Windows users: http://store.steampowered.com/hwsurvey/ http://store.steampowered.com/hwsurvey/ click on “Other settings” glhf

Technically anyone with a modern Intel CPU has access to the SIMD instructions needed for using 128 bit registers. We probably won't see larger then 64bit bus/address access for some time as we don't need it currently.

justincormack 10y ago

Risc-V has a 128 bit design (as well as 32 and 64), although no one is currently implementing it.

Const-me 10y ago

PCs have a set of 128-bit registers for like 15 years, both Intel and AMD. For integer/fixed point math, the functionality is here since SSE2: https://en.wikipedia.org/wiki/SSE2 https://en.wikipedia.org/wiki/SSE2

bluejekyll 10y ago
I've not had a chance to do more than rely on my compiler to target those. I guess I should play with them more.
- Const-me 10y ago
  A couple of advices for you then. Unless you’re planning to do reverse engineering, or planning to work on a compiler, learning assembler is mostly pointless. In most cases, real-world algorithms contain both vector code in the inner loops, and scalar code everywhere else. When coding assembler you need to use it for both, and assembler ain’t exactly user-friendly. Using C or C++ language with SSE intrinsics is the way to go. All modern compilers support them. Intel’s documentation is the best so far, but there’s no offline searchable version. I’ve created one: https://github.com/Const-me/IntelIntrinsics/releases https://github.com/Const-me/IntelIntrinsics/releases Memory layout is a king. You need to keep the input and output data SSE-friendly: aligned, dense, sequential access patterns are preferred. This could mean you need to [re]design some parts of your software specifically for SSE. There’re multiple generations of hardware. When writing manually-vectorized code, the compiler won’t tell you what CPUs it’ll run on. SSE2 is the most compatible. Here’s some statistics about Windows users: http://store.steampowered.com/hwsurvey/ http://store.steampowered.com/hwsurvey/ click on “Other settings” glhf