3 ms·

I think the RISC-V is way faster, otherwise you probably won't have any advantage, except knowing that the whole ISA is opensource in contrast to AVR chips.

dmitrygr 10y ago
It promises to maybe be faster. Has no internal flash, cannot be bought in volume if you intend to actually make anything, has a very immature toolchain, and currently is a theory only.
- ajross 10y ago
  These SiFive folks claim to have working silicon, there are what look like some power measurements on their site, and there are photographs of boards available for a claimed ship date in ~3 weeks. It's not in my hands personally, but they seem to be over the vapor hump. I found it an exciting enough product to drop $60 on, anyway.
- mastax 10y ago
  Your disclaimers are fair in that if you want an Arduino, buy an Arduino. But if a 320 MHz anything is slower than a 24 MHz AVR then the sky is falling.
iammyIP 10y ago
The RISC-V seems to have it's focus on being open and being simple, not so much on being the fastest. The specs are only 130 pages. https://riscv.org/risc-v-foundation/ https://riscv.org/risc-v-foundation/ https://riscv.org/specifications/ https://riscv.org/specifications/
- monocasa 10y ago
  It's a simple ISA, but built to be fast. It's specifically designed to map well to OoO cores at the slight expense of some features on in order cores that give you little boosts (like branch delay slots and other exposed pipeline features). Last I saw, BOOM compared very well to other OoO cores at the same gate count.
  - userbinator 10y ago
    If anything I think RISC-V is repeating the same mistakes as MIPS and the original RISCs, by being far too simple and requiring much greater fetch bandwidth in the process. The performance of MIPS, which it is closest to, has never really been considered anything more than "acceptable". It loses to ARM (which isn't so RISC-y anyway) and x86, so I expect RISC-V to be about the same: https://www.extremetech.com/extreme/188396-the-final-isa-showdown-is-arm-x86-or-mips-intrinsically-more-power-efficient https://www.extremetech.com/extreme/188396-the-final-isa-sho... http://www.extremetech.com/wp-content/uploads/2014/08/AverageEnergy.png http://www.extremetech.com/wp-content/uploads/2014/08/Averag... Compared to an 8-bit AVR in an Arduino it's definitely much faster, but compared to other 32-bit architectures, it is not.
    - monocasa 10y ago
      They've made their compressed ISA a first class citizen, with code density that's in the Thumb2 range.
    - pawadu 10y ago
      To be fair, the new 64-bit ARMs are becoming "more RISC-y" and have the same problems as MIPS.

dmitrygr 10y ago

It promises to maybe be faster. Has no internal flash, cannot be bought in volume if you intend to actually make anything, has a very immature toolchain, and currently is a theory only.

ajross 10y ago
These SiFive folks claim to have working silicon, there are what look like some power measurements on their site, and there are photographs of boards available for a claimed ship date in ~3 weeks. It's not in my hands personally, but they seem to be over the vapor hump. I found it an exciting enough product to drop $60 on, anyway.
mastax 10y ago
Your disclaimers are fair in that if you want an Arduino, buy an Arduino. But if a 320 MHz anything is slower than a 24 MHz AVR then the sky is falling.

iammyIP 10y ago

The RISC-V seems to have it's focus on being open and being simple, not so much on being the fastest. The specs are only 130 pages. https://riscv.org/risc-v-foundation/ https://riscv.org/risc-v-foundation/ https://riscv.org/specifications/ https://riscv.org/specifications/

monocasa 10y ago
It's a simple ISA, but built to be fast. It's specifically designed to map well to OoO cores at the slight expense of some features on in order cores that give you little boosts (like branch delay slots and other exposed pipeline features). Last I saw, BOOM compared very well to other OoO cores at the same gate count.
- userbinator 10y ago
  If anything I think RISC-V is repeating the same mistakes as MIPS and the original RISCs, by being far too simple and requiring much greater fetch bandwidth in the process. The performance of MIPS, which it is closest to, has never really been considered anything more than "acceptable". It loses to ARM (which isn't so RISC-y anyway) and x86, so I expect RISC-V to be about the same: https://www.extremetech.com/extreme/188396-the-final-isa-showdown-is-arm-x86-or-mips-intrinsically-more-power-efficient https://www.extremetech.com/extreme/188396-the-final-isa-sho... http://www.extremetech.com/wp-content/uploads/2014/08/AverageEnergy.png http://www.extremetech.com/wp-content/uploads/2014/08/Averag... Compared to an 8-bit AVR in an Arduino it's definitely much faster, but compared to other 32-bit architectures, it is not.
  - monocasa 10y ago
    They've made their compressed ISA a first class citizen, with code density that's in the Thumb2 range.
  - pawadu 10y ago
    To be fair, the new 64-bit ARMs are becoming "more RISC-y" and have the same problems as MIPS.