4 ms·
Traditionally yes. On the latest CPUs - who knows.
by capnfantasic 10y ago
Traditionally yes. On the latest CPUs - who knows.
- SonOfLilit 10y agoProbably yes, because Intel knows this is the code every compiler outputs for zeroing a register. Also, the reason it is "faster" is that the encoding is 1 byte, vs. 9 bytes (in 64 bit) for "mov rbp, 0" - roughly, 1 for "mov rbp,", 8 more for a 64 bit "0".
- bonzini 10y agoTechnically you could get by with 5 bytes for "mov ebp, 0". Another reason why it was faster was that the processor recognized it and avoided partial flags stalls after an "inc". But in 64-bit code you rarely have "inc" at all, so it matters less. On the other hand, a few years ago XOR had a false dependency on the register you're clearing; I'm not sure it is still that way on more recent processors.
- SonOfLilit 10y agoI tip my hat to you, your analysis is far more interesting than mine.
- bonzini 10y agoWrong too, it's partial register stalls not partial flags stalls.