3 ms·

>“vector” instructions (multiple consecutive operations) I thought "vector" in the context of CPU instructions just meant more than one. Is there a definition

• wyldfire 10y ago
  In the more mathematical sense the "vectors" are the matrices. Vector instructions are usually implemented as fixed-size SIMD operations that do some chunk-sized work on a problem. These new instructions would seemingly operate on an entire vector/matrix.
• gpderetta 10y ago
  Historically vector processors had vector registers but scalar ALU execution units (although possibly more than one). Vector instructions were "just" a way to make sure that the ALU was fed a new operation every cycle without instruction fetch and loop overhead. It also made it easier to pipeline reading from main memory (main memory latency wasn't so high a that time, so the large vector operations made it possible to pipeline reads with processing without stalling the CPU). None of those issues has been a bottleneck for a while and the memory subsystem of a modern computer is significantly different, so classic vector processors have fallen out of favour. In contrast more modern SIMD machines normally have the vector execution units as wide as the register themselves and the advantage, in addition to 1 N-vector ALU being more power and area efficient than N scalar ones, is that, in an OoO machine, less in-flight instructions need to be tracked. It is also easier to take advantage of wider memory/cache busses. Because classic vectors machines processed elements one at a time, it was possible to have efficient accumulating operations, which is significantly harder on proper SIMD processors (so called horizontal operations).