3 ms·
Verilog does exactly this. You design the logic than simulate all the gates. I'm sure there's some open cores out there ready for simulation if someone wants to
by throwbsidbdk 10y ago
Verilog does exactly this. You design the logic than simulate all the gates. I'm sure there's some open cores out there ready for simulation if someone wants to fiddle with it
- kingosticks 10y agoSimulations of complex modern chips don't run in real time.