For the intel the L2 cache (and the L1 of course) are shared for both the hyperthreads, so each hyperthread would get even less than 256K. On AMD, however each

For the intel the L2 cache (and the L1 of course) are shared for both the hyperthreads, so each hyperthread would get even less than 256K. On AMD, however each thread gets the full 512K. The L3 latency is much larger than the L2 (~40 cycles IIRC) so the smaller L2 would limit the performance of a cache hungry (but not too hungry: see next paragraph) application. One place where the larger L3 is a win is on low parallelism, memory hungry loads -- they have a much larger L3 all to themselves.