3 ms·
Don't forget CSS, your VHDL would look ugly without that sweet CSS
by Raed667 10y ago
Don't forget CSS, your VHDL would look ugly without that sweet CSS
- danblick 10y agoSomewhere, a lonely nerd feels like this is the perfect match for his passion for VHDL/CSS. :) Or maybe he's a Verilog guy who will keep looking. ;)