About the chips not being "optimal", say an Intel processor has 50M gates, to be placed in a 50M squares (all possible layouts). Then there would be factorial(5

About the chips not being "optimal", say an Intel processor has 50M gates, to be placed in a 50M squares (all possible layouts). Then there would be factorial(50M) possibilities. If you could simulate each one every clock cycle, you would need 10^1000000000 seconds. The age of the universe is about 10^17 seconds. It is just not practical to omptimize the layout like that. And having all gates in blocks gets us very acceptable local optima anyways (gates inside a block tend to be more interconnected with each other most of the cases) EDIT: clarification