Is the experience-based career mostly because the methods behind verification haven't changed much? VHDL and Verilog haven't changed much compared to the softwa

Is the experience-based career mostly because the methods behind verification haven't changed much? VHDL and Verilog haven't changed much compared to the software world where new languages with novel features come out every week. The technological advances come in the form of larger FPGA fabric in chips and better fab processes but the HDL running on there is not much different than the HDL running on there 15 years ago. So what I'm thinking is that the job of a verification engineer hasn't changed much so the old guys can still keep up with the recent grads. Therefore, when a team needs a new verification eng, they look at someone who's been at it for 10+ years and the kid who just got out of school and say the old guy might cost more but he should know what he's doing after all these years whereas the kid is cheaper to hire but he's been doing this maybe a couple semesters and an internship.