> Well, this is one way of going about it. It's honestly probably the best way of going about it. The target-independent backend in LLVM really isn't designed

> Well, this is one way of going about it. It's honestly probably the best way of going about it. The target-independent backend in LLVM really isn't designed for these kinds of architectures. When you have pointers that don't fit in registers, an extremely register-starved architecture (6502), crippled "index registers", no stack-relative addressing, a tiny stack, odd concepts like zero-page, etc. then most of LLVM's codegen infrastructure isn't applicable. I'm sure it's technically possible to slot some kind of 8-bit codegen into the framework, but the fact that it's been tried many times and hasn't succeeded indicates to me that it's just not worth it. It seems a lot easier to just write a custom code generator that lowers LLVM IR to the target with its own mechanisms, and using the SDCC backend is likely as reasonable a choice as any other.