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The qemu support for RISC-V is being upstreamed right now and there is also the Spike RISC-V simulator that you can use. There are various soft CPUs that can be
by mynameislegion 10y ago
The qemu support for RISC-V is being upstreamed right now and there is also the Spike RISC-V simulator that you can use. There are various soft CPUs that can be run in FPGAs too.
- tbirdz 10y agoThanks for giving some specific examples of risc-v emulators. I was curious if using an fpga or emulator based solution (assuming it could fit in a rack enclosure) would be acceptable for the Fedora team, or if they wanted actual bare-metal risc-v hardware.
- asb 10y agoQEMU on modern x86 is going to give _much_ better performance than an FPGA.
- bonzini 10y agoOnly linux-user is going to be accepted upstream until the privileged spec is finalized.
- hedora 10y agoI'm looking for a performant way to run RISC-V code in the next year or so. Any idea how sophisticated the QEMU emualtor is? For instance, is it JITing to X86, or interpreting? Is there low hanging fruit there on the CPU performance side? On a related note, is throwing money at the FPGA vendors going to change the tradeoff, or is QEMU already winning against top-end hardware?
- pm215 10y agoQEMU always JITs to the host, regardless of target.
- rwmj 10y agoQEMU JITs the code and is very performant, much faster than any FPGAs. The two lowest hanging fruit now are: - Multithreaded TCG would let us use multiple host cores (eg allowing parallel builds). MT-TCG is a very new feature even in QEMU. - Adding virtio 1.0 support would allow us to use much more efficient block devices. qemu-user exists already and avoids both these issues, however we cannot use it for final builds because of concerns over incorrect building when the kernel isn't a RISC-V kernel. For preliminary test-building it is fine, and very fast on Intel Xeon host hardware.