> In theory you can scale this up and copy the contents of memory into an FPGA ... In practice it would have to be in external memory (DDR, flash, etc.) that t

> In theory you can scale this up and copy the contents of memory into an FPGA ... In practice it would have to be in external memory (DDR, flash, etc.) that the FPGA would use to back transactions because FPGAs don't have 32GB of memory capacity. Problems then become meeting bus timings that may very well be tuned for the PCB layout.