5 ms·
The architecture states that CTR_EL0 reports the _minimum_ ICache line size across all cores. In this system, that would be 64 bytes.
by oshepherd 10y ago
The architecture states that CTR_EL0 reports the _minimum_ ICache line size across all cores.
In this system, that would be 64 bytes.
- pawadu 10y agoCan you point me to the manual that does say so? This is all I could find on the subject > [3:0] IminLine Log 2 of the number of words in the smallest cache line of all the Instruction Caches that the processor controls. > This values is: > 0x4 > Smallest Instruction Cache line size is 16 words.