3 ms·

I don't think that helps - the point is that the flush might not be effective if the flushing thread gets scheduled away from the core which has the stale I$ be

by caf 10y ago

I don't think that helps - the point is that the flush might not be effective if the flushing thread gets scheduled away from the core which has the stale I$ before it manages to fully issue the flush. Or is the flush guaranteed to flush all cores caches? That would be a fairly unusual design.

oshepherd 10y ago
IC IVAU instructions are broadcast to all cores in the same 'inner shareable domain' (all cores running the same OS instance are in the same inner shareable domain)
- caf 10y ago
  That does seem like a good solution to let you do this kind of invalidation in userspace. Thanks.