So, what do you think about BitBabbler's analysis and design while you're at it? The problem with BitBabbler is that they have a lot of text but, as far as I c

So, what do you think about BitBabbler's analysis and design while you're at it? The problem with BitBabbler is that they have a lot of text but, as far as I can tell, no circuit diagrams and no real discussion of what they're doing. It may just be that their wall of text makes me go cross-eyed, but my snakeoil detector goes off whenever I start reading their web page. For example, the talk about sample-and-hold circuits as "analog shift registers" and worrying about quantization seems slightly unhinged (for one, if you need more resolution, just use a bigger sampling cap). Apologies to the BitBabbler people if they're on the up-and-up, but a page that talks about auditability and verifiability but doesn't show a schematic seems slightly dishonest. (Sorry... rant mode off.) Thanks for the kind words regarding verifiable ASICs! You are absolutely right that there's a ton of complexity to worry about here. But I sincerely hope that the world makes more headway on this problem, so I'm really glad you're thinking about it.