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Yes, the TMC 1795 had an instruction decoder. Architecturally, it's a very normal 1970s microprocessor. (The 4004, in comparison, is kind of strange.) The one t
by kens 10y ago
Yes, the TMC 1795 had an instruction decoder. Architecturally, it's a very normal 1970s microprocessor. (The 4004, in comparison, is kind of strange.) The one thing that's unusual from our perspective is the subroutine stack is on-chip, with 8 levels.
If you look at the image, the chip can be split into three horizontal slices. At the top is instruction decoding. In the middle is the ALU. At the bottom is the register file. TI originally designed the processor as three chips, and this remained visible in the final chip.
There's very little written about the chip, so I plan to write about its architecture some time. The patents are very detailed (TI is good that way), and explain almost everything if you take the time to go through them.
Here's a block diagram of the chip: https://goo.gl/photos/TRXRc2VKhQNaVxhG9 https://goo.gl/photos/TRXRc2VKhQNaVxhG9
- mzs 10y agoThanks again, looks like it was the decoder and register in the low res image of the die that I saw. I eagerly await to read your article detailing the 1795. I suppose the 8 level stack was to allow it to be used without RAM. Also didn't the AGC use an approach a bit similar to what Boysel did with a ROM for many instructions built from smaller instructions? It also reminds me a bit of a TTA.
- kens 10y agoI think the on-chip stack was a historical artifact. The Datapoint 2200 is the TTL-based computer whose architecture was copied for the 8008 and TMC 1795. The 2200 used serial shift-register memory [1], so writing the PC to a stack in memory would be very slow and inconvenient. Instead it used 8 words of (expensive) RAM as the stack for system calls. The 8008 and TMX 1795 copied the Datapoint 2200 architecture, including the 8-address stack. Intel moved to a "normal" stack in memory with the 8080, which is in many ways a cleaned-up 8008. Another interesting historical artifact from the Datapoint 2200's shift-register memory and serial processor is that when you're operating on one bit at a time, you want to start with the lowest bit, so you end up with a little-endian processor. For compatibility the 8008 was little-endian, and thus x86, and thus the processor you're probably using now. [1] http://www.righto.com/2014/12/inside-intel-1405-die-photos-of-shift.html http://www.righto.com/2014/12/inside-intel-1405-die-photos-o...