3 ms·
Amusingly enough, performance enhancing features like cache or a flexible interrupt controller get in the way of a system's "real-timeness", because the timing
by AceJohnny2 10y ago
Amusingly enough, performance enhancing features like cache or a flexible interrupt controller get in the way of a system's "real-timeness", because the timing of operations is no longer clearly deterministic. That's why ARM has cores like the Cortex-R series (R as in Realtime) that do promise real-time characteristics. The Sitara in the Beagleboard has a Cortex-A (A as in Application), which is not designed for realtime.
So yeah, it's more than just the OS.
- Narishma 10y agoAFAIK you can disable (or rather not enable) the cache(s) and use a simple interrupt scheme in any standard ARM core (at least it's possible on the Raspberry Pi).
- Gibbon1 10y agoJust simply having interrupts will mess with a hard real time processes. Total sketchtastic, some modern processors have background stuff that takes control every so often.
- greggyb 10y agoThanks much. I learned something new from you and the sibling comment!