Nitpick: Verilog is a programming language (see especially testbenches) with syntax and a runtime geared towards modeling hardware. It allows simple creation o

Nitpick: Verilog is a programming language (see especially testbenches) with syntax and a runtime geared towards modeling hardware. It allows simple creation of lightweight shared-everything threads (called processes, confusingly, and they are not OS threads or processes, they are local to the language runtime) which are used to model concurrent hardware. It has its own built-in scheduler that decides when to run each thread. It has numerous synchronization methods and events (wait, @, #12ns, etc.) in addition to plain-old shared memory that threads use to coordinate with each other, and block and trigger thread execution. When modeling digital circuits a single shared-memory variable, usually named clock or clk, is the one variable most of these threads synchronize to. Mostly hardware designers get away without thinking about all those above details in those terms, but sometimes you get bit by them (race-conditions between threads can occur, sadly) and it helps to understand it. All programming is modeling of some sort or another.