I don't know, but I'm skeptical. It depends too much on whether the computationally intensive (and latency sensitive) parts of cloud-y workloads become highly

I don't know, but I'm skeptical. It depends too much on whether the computationally intensive (and latency sensitive) parts of cloud-y workloads become highly specialized, or common. If they're common, you'll just have a set of ASIC-based accelerators, or Intel will start putting in accelerators for them on their chips. This is probably the most likely path. But if it turns out that genomics needs one thing, banking needs another, CAD/design/sim another, etc., then FPGAs might work. Low volume + low money = CPU. Low volume + crazy money -> high frequency trading = FPGAs viable. Low volume + really hard realtime control or fast signal processing -> Often FPGA, but DSPs are still viable. Medium volume + decent money = FPGA. Baidu and MS's deep learning fits here. High volume = ASIC. Google's TPUs fit here. Machine learning and DNNs seem to be in the process of jumping from mostly-CPU to serious ASIC. FPGA's success also depends on how well Intel and the ARM ecosystem can start to support medium-volume customization. Intel's historically been more exclusively high-volume, but if you look at the kinds of deals they're inking with their tier-one (and two?) customers, it's clear they're trying to move in that direction: https://goparallel.sourceforge.net/intel-bets-big-custom-xeon-chips-cloud-companies/ https://goparallel.sourceforge.net/intel-bets-big-custom-xeo... The challenge for FPGAs is that the better the design & synthesis tools get to support FPGA, the easier it is for the CPU manufacturers to do the same thing and adapt more rapidly. The core advantage the FPGAs retain is that they can be retargeted much more easily, and their dev cycle is shorter. My crystal ball is fuzzy. :)