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Microcode isn't the same a RISC. With an actual instruction set you are bound to an architecture, microcode changes with the microarchitecture so it can contai

Microcode isn't the same a RISC. With an actual instruction set you are bound to an architecture, microcode changes with the microarchitecture so it can contain optimizations that would break compatibility if used in a general way. Intel tried to move away from CISC with EPIC (Itanium), which could be considered a kind of RISC, but it obviously didn't work out.

ComputerGuru 17y ago
Didn't it? The Itanium is a great performer. Like I mention below in another comment, if only for AMD which beat Intel to the x64 punch with the hybrid x86_64 architecture, we'd be all on Intel's vision of true 64-bit computing: the Itanium. All computer architecture PhDs I've spoken to have referred to the Itanium with an air of awe. It was built from the ground-up with all the optimizations and bottlenecks in mind, and can be statically optimized to do magic... except no one is ever going to use it since it requires all applications to be recompiled, and with x86_64 offering an easy way out, that's not going to happen.
- Nelson69 17y ago
  If AMD didn't introduce x86-64, we'd all be using PowerPC and 32bit x86 still. IA64 suffers from the same problems as all the other RISCs out there that died, it has potential to do magic but there just aren't that many magic compilers and the output tends to look sort of mundane. The whole RISC vs. CISC is off the point, that was decided a long while ago. x86 "CISC" which is quite a bit more RISCy than say VAX or 370 happens to be a very compelling blend. ARM does have an interesting position in the ultra lower power field though. I suspect that has more to do with ARM being designed for that from the start than the instruction set though.
- sloughly 17y ago
  I'm also a fan of Itanium. Instruction encoding is a bit weird (41 bits, really?), but many cool ideas to give the compiler more control. My point was that if microcode were the same as simply expanding CISC instructions into multiple RISC instructions, Intel could have gotten away with designing a RISC chip that was performant on x86 by simply expanding each x86 instruction into the new architecture. The performance of x86 on Itanium wasn't too great (and was one of the reasons it didn't do so well).
- 1amzave 17y ago
  > All computer architecture PhDs I've spoken to have referred to the Itanium with an air of awe. Really? I've had pretty much exactly the opposite experience. In computer architecture circles I find it's actually more often referred to as "Itanic" than "Itanium", if that's any indicator. I think what's probably most sad about the Itanium debacle is that it brought about the end of Alpha, PA-RISC, and (non-embedded) MIPS, and all apparently for naught. A slight aside: it doesn't really say much about it's technical merits one way or another, but Wikipedia has a pretty amazing chart of predicted vs. actual sales figures for Itani{c,um} over time: http://en.wikipedia.org/wiki/File:Itanium_Sales_Forecasts_edit.png http://en.wikipedia.org/wiki/File:Itanium_Sales_Forecasts_ed... (you can just see it falling on its face over the course of a decade).

ComputerGuru 17y ago

Didn't it? The Itanium is a great performer. Like I mention below in another comment, if only for AMD which beat Intel to the x64 punch with the hybrid x86_64 architecture, we'd be all on Intel's vision of true 64-bit computing: the Itanium. All computer architecture PhDs I've spoken to have referred to the Itanium with an air of awe. It was built from the ground-up with all the optimizations and bottlenecks in mind, and can be statically optimized to do magic... except no one is ever going to use it since it requires all applications to be recompiled, and with x86_64 offering an easy way out, that's not going to happen.

Nelson69 17y ago
If AMD didn't introduce x86-64, we'd all be using PowerPC and 32bit x86 still. IA64 suffers from the same problems as all the other RISCs out there that died, it has potential to do magic but there just aren't that many magic compilers and the output tends to look sort of mundane. The whole RISC vs. CISC is off the point, that was decided a long while ago. x86 "CISC" which is quite a bit more RISCy than say VAX or 370 happens to be a very compelling blend. ARM does have an interesting position in the ultra lower power field though. I suspect that has more to do with ARM being designed for that from the start than the instruction set though.
sloughly 17y ago
I'm also a fan of Itanium. Instruction encoding is a bit weird (41 bits, really?), but many cool ideas to give the compiler more control. My point was that if microcode were the same as simply expanding CISC instructions into multiple RISC instructions, Intel could have gotten away with designing a RISC chip that was performant on x86 by simply expanding each x86 instruction into the new architecture. The performance of x86 on Itanium wasn't too great (and was one of the reasons it didn't do so well).
1amzave 17y ago
> All computer architecture PhDs I've spoken to have referred to the Itanium with an air of awe. Really? I've had pretty much exactly the opposite experience. In computer architecture circles I find it's actually more often referred to as "Itanic" than "Itanium", if that's any indicator. I think what's probably most sad about the Itanium debacle is that it brought about the end of Alpha, PA-RISC, and (non-embedded) MIPS, and all apparently for naught. A slight aside: it doesn't really say much about it's technical merits one way or another, but Wikipedia has a pretty amazing chart of predicted vs. actual sales figures for Itani{c,um} over time: http://en.wikipedia.org/wiki/File:Itanium_Sales_Forecasts_edit.png http://en.wikipedia.org/wiki/File:Itanium_Sales_Forecasts_ed... (you can just see it falling on its face over the course of a decade).