4 ms·

In fact, it’s now a universally accepted truth that RISC is better than CISC! Is that actually true? I'd like to see some actual numbers comparing RISC vs. CIS

In fact, it’s now a universally accepted truth that RISC is better than CISC! Is that actually true? I'd like to see some actual numbers comparing RISC vs. CISC performance/power consumption.

ComputerGuru 17y ago
Author here. You'd be comparing apples and oranges. CPUs are optimized for specific use cases. There's always a tradeoff between the performance of each component, and current x86 CPUs are designed/built-for the desktop while current ARM/MIPS/etc. are made for embedded and mobile devices. Atom comes close to being comparable to certain embedded devices, but not really. Because it's actually a desktop architecture (resembles older in-order execution x86 desktop PCs) scaled down and simplified to reduce power. Within the field though, it's taken for fact. To me though, nothing says it clearer than that Intel internally converts CISC instructions to a series of RISC instructions, then enters them into the pipeline. If it weren't for compatibility issues, Intel would be RISC today.
- sloughly 17y ago
  Microcode isn't the same a RISC. With an actual instruction set you are bound to an architecture, microcode changes with the microarchitecture so it can contain optimizations that would break compatibility if used in a general way. Intel tried to move away from CISC with EPIC (Itanium), which could be considered a kind of RISC, but it obviously didn't work out.
  - ComputerGuru 17y ago
    Didn't it? The Itanium is a great performer. Like I mention below in another comment, if only for AMD which beat Intel to the x64 punch with the hybrid x86_64 architecture, we'd be all on Intel's vision of true 64-bit computing: the Itanium. All computer architecture PhDs I've spoken to have referred to the Itanium with an air of awe. It was built from the ground-up with all the optimizations and bottlenecks in mind, and can be statically optimized to do magic... except no one is ever going to use it since it requires all applications to be recompiled, and with x86_64 offering an easy way out, that's not going to happen.
    - Nelson69 17y ago
      If AMD didn't introduce x86-64, we'd all be using PowerPC and 32bit x86 still. IA64 suffers from the same problems as all the other RISCs out there that died, it has potential to do magic but there just aren't that many magic compilers and the output tends to look sort of mundane. The whole RISC vs. CISC is off the point, that was decided a long while ago. x86 "CISC" which is quite a bit more RISCy than say VAX or 370 happens to be a very compelling blend. ARM does have an interesting position in the ultra lower power field though. I suspect that has more to do with ARM being designed for that from the start than the instruction set though.
    - sloughly 17y ago
      I'm also a fan of Itanium. Instruction encoding is a bit weird (41 bits, really?), but many cool ideas to give the compiler more control. My point was that if microcode were the same as simply expanding CISC instructions into multiple RISC instructions, Intel could have gotten away with designing a RISC chip that was performant on x86 by simply expanding each x86 instruction into the new architecture. The performance of x86 on Itanium wasn't too great (and was one of the reasons it didn't do so well).
    - 1amzave 17y ago
      > All computer architecture PhDs I've spoken to have referred to the Itanium with an air of awe. Really? I've had pretty much exactly the opposite experience. In computer architecture circles I find it's actually more often referred to as "Itanic" than "Itanium", if that's any indicator. I think what's probably most sad about the Itanium debacle is that it brought about the end of Alpha, PA-RISC, and (non-embedded) MIPS, and all apparently for naught. A slight aside: it doesn't really say much about it's technical merits one way or another, but Wikipedia has a pretty amazing chart of predicted vs. actual sales figures for Itani{c,um} over time: http://en.wikipedia.org/wiki/File:Itanium_Sales_Forecasts_edit.png http://en.wikipedia.org/wiki/File:Itanium_Sales_Forecasts_ed... (you can just see it falling on its face over the course of a decade).
- anamax 17y ago
  > To me though, nothing says it clearer than that Intel internally converts CISC instructions to a series of RISC instructions, then enters them into the pipeline. One problem with that argument is that RISC machines do the same thing. Another problem is that there are different amounts of available/potential bandwidth at different points. For example, L2 accesses are far more expensive than what a decoder can produce. There's always some benefit to reducing the number of control bits, but it is especially pronounced the further that you get from functional units. BTW - "the pipeline" is misleading. Many implementations use multiple pipelines even for a single instruction stream. > Within the field though, it's taken for fact. There may be a theoretical advantage, but if so, it is small relative to many other factors. I've actually helped define a commercial ISA (RISC FWIW).
kjhghjmkedfcv 17y ago
Sparc vs Intel? Which is your desktop running? It might be a slightly different answer at your web host!
1amzave 17y ago
> In fact, it’s now a universally accepted truth that RISC is better than CISC! > Is that actually true? I'd like to see some actual numbers comparing RISC vs. CISC performance/power consumption. While I realize you intended your question about the latter part ("that RISC is better than CISC"), I'd say the prior part ("universally accepted truth") is absolutely, unequivocally not true. Just last weekend [1] I heard Yale Patt (a relatively Big Name in computer architecture) refer to RISC as something like "a hiccup that lasted 20 years" -- a slightly less than flattering description. Not saying I necessarily agree with him, but agreement is far from universal. There are plenty of other examples as well; see http://portal.acm.org/citation.cfm?id=1506661.1506667 http://portal.acm.org/citation.cfm?id=1506661.1506667 for one I came across recently. [1] Incidentally, at the same event I also met an Intrinsity chip-design engineer who said his company was in the process of being acquired, though at the time he didn't mention it was by Apple...

In fact, it’s now a universally accepted truth that RISC is better than CISC! Is that actually true? I'd like to see some actual numbers comparing RISC vs. CISC performance/power consumption.

ComputerGuru 17y ago

Author here. You'd be comparing apples and oranges. CPUs are optimized for specific use cases. There's always a tradeoff between the performance of each component, and current x86 CPUs are designed/built-for the desktop while current ARM/MIPS/etc. are made for embedded and mobile devices. Atom comes close to being comparable to certain embedded devices, but not really. Because it's actually a desktop architecture (resembles older in-order execution x86 desktop PCs) scaled down and simplified to reduce power. Within the field though, it's taken for fact. To me though, nothing says it clearer than that Intel internally converts CISC instructions to a series of RISC instructions, then enters them into the pipeline. If it weren't for compatibility issues, Intel would be RISC today.

sloughly 17y ago
Microcode isn't the same a RISC. With an actual instruction set you are bound to an architecture, microcode changes with the microarchitecture so it can contain optimizations that would break compatibility if used in a general way. Intel tried to move away from CISC with EPIC (Itanium), which could be considered a kind of RISC, but it obviously didn't work out.
- ComputerGuru 17y ago
  Didn't it? The Itanium is a great performer. Like I mention below in another comment, if only for AMD which beat Intel to the x64 punch with the hybrid x86_64 architecture, we'd be all on Intel's vision of true 64-bit computing: the Itanium. All computer architecture PhDs I've spoken to have referred to the Itanium with an air of awe. It was built from the ground-up with all the optimizations and bottlenecks in mind, and can be statically optimized to do magic... except no one is ever going to use it since it requires all applications to be recompiled, and with x86_64 offering an easy way out, that's not going to happen.
  - Nelson69 17y ago
    If AMD didn't introduce x86-64, we'd all be using PowerPC and 32bit x86 still. IA64 suffers from the same problems as all the other RISCs out there that died, it has potential to do magic but there just aren't that many magic compilers and the output tends to look sort of mundane. The whole RISC vs. CISC is off the point, that was decided a long while ago. x86 "CISC" which is quite a bit more RISCy than say VAX or 370 happens to be a very compelling blend. ARM does have an interesting position in the ultra lower power field though. I suspect that has more to do with ARM being designed for that from the start than the instruction set though.
  - sloughly 17y ago
    I'm also a fan of Itanium. Instruction encoding is a bit weird (41 bits, really?), but many cool ideas to give the compiler more control. My point was that if microcode were the same as simply expanding CISC instructions into multiple RISC instructions, Intel could have gotten away with designing a RISC chip that was performant on x86 by simply expanding each x86 instruction into the new architecture. The performance of x86 on Itanium wasn't too great (and was one of the reasons it didn't do so well).
  - 1amzave 17y ago
    > All computer architecture PhDs I've spoken to have referred to the Itanium with an air of awe. Really? I've had pretty much exactly the opposite experience. In computer architecture circles I find it's actually more often referred to as "Itanic" than "Itanium", if that's any indicator. I think what's probably most sad about the Itanium debacle is that it brought about the end of Alpha, PA-RISC, and (non-embedded) MIPS, and all apparently for naught. A slight aside: it doesn't really say much about it's technical merits one way or another, but Wikipedia has a pretty amazing chart of predicted vs. actual sales figures for Itani{c,um} over time: http://en.wikipedia.org/wiki/File:Itanium_Sales_Forecasts_edit.png http://en.wikipedia.org/wiki/File:Itanium_Sales_Forecasts_ed... (you can just see it falling on its face over the course of a decade).
anamax 17y ago
> To me though, nothing says it clearer than that Intel internally converts CISC instructions to a series of RISC instructions, then enters them into the pipeline. One problem with that argument is that RISC machines do the same thing. Another problem is that there are different amounts of available/potential bandwidth at different points. For example, L2 accesses are far more expensive than what a decoder can produce. There's always some benefit to reducing the number of control bits, but it is especially pronounced the further that you get from functional units. BTW - "the pipeline" is misleading. Many implementations use multiple pipelines even for a single instruction stream. > Within the field though, it's taken for fact. There may be a theoretical advantage, but if so, it is small relative to many other factors. I've actually helped define a commercial ISA (RISC FWIW).

kjhghjmkedfcv 17y ago

Sparc vs Intel? Which is your desktop running? It might be a slightly different answer at your web host!

1amzave 17y ago

> In fact, it’s now a universally accepted truth that RISC is better than CISC! > Is that actually true? I'd like to see some actual numbers comparing RISC vs. CISC performance/power consumption. While I realize you intended your question about the latter part ("that RISC is better than CISC"), I'd say the prior part ("universally accepted truth") is absolutely, unequivocally not true. Just last weekend [1] I heard Yale Patt (a relatively Big Name in computer architecture) refer to RISC as something like "a hiccup that lasted 20 years" -- a slightly less than flattering description. Not saying I necessarily agree with him, but agreement is far from universal. There are plenty of other examples as well; see http://portal.acm.org/citation.cfm?id=1506661.1506667 http://portal.acm.org/citation.cfm?id=1506661.1506667 for one I came across recently. [1] Incidentally, at the same event I also met an Intrinsity chip-design engineer who said his company was in the process of being acquired, though at the time he didn't mention it was by Apple...