3 ms·
> Verilog isn't a programming language. It is a hardware description language. It is used to describe the behavior of hardware. In short, coding in verilog is
by e19293001 10y ago
> Verilog isn't a programming language. It is a hardware description language. It is used to describe the behavior of hardware.
In short, coding in verilog is like creating a schematic of the circuit.
- krupan 10y agoYou can write Verilog as schematic-like description, but there is a higher-level of modeling supported by synthesis tools that doesn't look quite so netlist like.