It also means you need to be extra careful compared to simpler architectures (like AVR). For example for locking you may need to disable/re-enable interrupts al

It also means you need to be extra careful compared to simpler architectures (like AVR). For example for locking you may need to disable/re-enable interrupts also within an ISR not just in the main loop / threads. If nesting is a problem for you and you want to be lazy, I think you can disable nesting between specific interrupts by giving them the same priority (though I can't find any docs right now about that).