4 ms·
The Cortex-M4 does not have a MMU; there are no page tables or anything. The MPU you mention is a sort of primitive MMU.
by comex 10y ago
The Cortex-M4 does not have a MMU; there are no page tables or anything. The MPU you mention is a sort of primitive MMU.
- emcrazyone 10y agoIt does on the Ti Jacinto6. In fact there are two MMUs. Cortex-M4 MMUs are implementation specific. The Jacinto6 (aka J6) M4s are housed in what they call an IPU. Each IPU (2 of them) have 2 Cortex-M4 cores for a total of 4. Each IPU has an IPU MMU (called an AMMU) and they also can access memory through the L3 MMU; the same that the A15 cores of that chip use. So when you say the Cortex-M4 does not have an MMU, you're categorically wrong because it can and does have one on Ti J6 chips.