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Formal verification of software is basically never done, but I was under the impression that chip vendors relied pretty heavily on both exhaustive state testing
by jldugger 10y ago
Formal verification of software is basically never done, but I was under the impression that chip vendors relied pretty heavily on both exhaustive state testing and formal verification.
- zerohp 10y agoExhaustive state testing is intractable for any modern design. Some combination of constrained random verification and directed testing is used. http://chipdesignmag.com/display.php?articleId=4913 http://chipdesignmag.com/display.php?articleId=4913
- AstralStorm 10y agoI wouldn't be so sure to call it intractable. It is pretty hard and time consuming, but not impossible by any stretch of imagination. Critical parts are hopefully exhaustively tested. Say, memory protection and security. That said, formal methods are better. ISA-Verifier is a pretty small tool though, nowhere near as strong as Isabelle model used for seL4 for example.