First we need to cool the chips. We can increase cooling rate, using micro channels that carry water. Darpa verified that we can increase it to "1 kW/cm2 die-le

First we need to cool the chips. We can increase cooling rate, using micro channels that carry water. Darpa verified that we can increase it to "1 kW/cm2 die-level heat flux with multiple local 30 kW/cm2 hot spots. This is about four to five times more heat per unit area than most current chips dissipate"[1]. Maybe we can do even better. The thing is - it's expensive. But than we can use this to build logic with memory on top ,and get huge bandwidth - and in multicore systems you could 100x performance in some algorithms , with easier programming. But this will be expensive. But than we could start using those systems, building an ecosystem around them, generate money - and slowly, generation by generation with a moore's law like race, work on building photonics to greatly decrease power consumption - and hence cost. That's at least the plan in [2]. Also relevant: ST microelectronics is in the final stages of opening a leading edge, commercial photonics fab. [1]https://www.helpnetsecurity.com/2016/03/11/microfluidic-cooling/ https://www.helpnetsecurity.com/2016/03/11/microfluidic-cool... [2]http://drum.lib.umd.edu/handle/1903/17153 http://drum.lib.umd.edu/handle/1903/17153