4 ms·
Completely concur with you. The ITRS reports indicate that if 3D integration hadn't become the new mechanism for increasing transistor density, that gate-lengt
by ghshephard 10y ago
Completely concur with you. The ITRS reports indicate that if 3D integration hadn't become the new mechanism for increasing transistor density, that gate-length reduction cycle would have run out of gas around 2028 - so about 12 years out regardless.
It remains to be seen we still have that 12 years of efficiency available to us after building 3D chips. I can easily imagine that heat distribution would be a real problem.
- ci5er 10y ago> I can easily imagine that heat distribution would be a real problem. Given how much of a problem it already is in 2D where the entire die area simply radiates "up and out", I think that head might be the real problem. I don't know how one would build a 3D embedded heat-sink, you know, something like this with the transistors and and connective mesh all around [1]. Maybe it looks like a Menger sponge [2], but that looks tough too! :-) [1] https://s3.amazonaws.com/s3-blogs.mentor.com/robinbornoff/files/2015/03/DHS1.png https://s3.amazonaws.com/s3-blogs.mentor.com/robinbornoff/fi... [2] https://en.wikipedia.org/wiki/Menger_sponge https://en.wikipedia.org/wiki/Menger_sponge
- petra 10y agoFirst we need to cool the chips. We can increase cooling rate, using micro channels that carry water. Darpa verified that we can increase it to "1 kW/cm2 die-level heat flux with multiple local 30 kW/cm2 hot spots. This is about four to five times more heat per unit area than most current chips dissipate"[1]. Maybe we can do even better. The thing is - it's expensive. But than we can use this to build logic with memory on top ,and get huge bandwidth - and in multicore systems you could 100x performance in some algorithms , with easier programming. But this will be expensive. But than we could start using those systems, building an ecosystem around them, generate money - and slowly, generation by generation with a moore's law like race, work on building photonics to greatly decrease power consumption - and hence cost. That's at least the plan in [2]. Also relevant: ST microelectronics is in the final stages of opening a leading edge, commercial photonics fab. [1]https://www.helpnetsecurity.com/2016/03/11/microfluidic-cooling/ https://www.helpnetsecurity.com/2016/03/11/microfluidic-cool... [2]http://drum.lib.umd.edu/handle/1903/17153 http://drum.lib.umd.edu/handle/1903/17153
- analognoise 10y agoIsn't diamond a thermal 'short'? Rather than using liquid, why not use vapour deposition diamond to draw the heat down to a cold finger or TEC (Perltier cooler)? I know if it was that easy we would already be doing it, but I'm hoping somebody knows why. Probably because interfacing the grown diamond to silicon creates interface stress that leads to cracking or...some other reason... :: mutters ::
- petra 10y agoI know there's a startup mentioned in eetimes working on daimond chips. It's startingin power chips, but i think they talked about going full on semi.
- ci5er 10y agoThat's actually pretty sweet (#1). Now we just need to find a way to build those microchannels stacked at every other layer or so without building fluid junction popping back-pressure! :-) Or maybe just plan on doubling down on photonics (your #2 suggestion); that certainly makes switching energy (and heat) go way waaay down.