> That doesn't rule out that there is some optimal compressed ISA that is a lot better than what RISC-V provides. There's an entire PhD thesis on the RISC-V co

> That doesn't rule out that there is some optimal compressed ISA that is a lot better than what RISC-V provides. There's an entire PhD thesis on the RISC-V compressed ISA (RVC) and it shows that RVC's compression comes fairly close to just using bzip on the binary! > instructions referencing registers inside such a subroutine could be shortened They're already 3-bit register specifiers... there's not much more to do here. At this point, either your binary fits in the icache and you're happy or it doesn't and no amount of 1-5% ideas is going to help you.