Obviously tooting my own horn here, but our solution is replacing hardware managed caches with software managed caches... You get to have larger, lower latency

Obviously tooting my own horn here, but our solution is replacing hardware managed caches with software managed caches... You get to have larger, lower latency "caches" of SRAM in our solution, that also use less power in moving data from RAM to the register file through them since we very granularly control the hierarchy.