3 ms·

Does that impact what type of memory topologies that you use too(I.E. SRAM only)? I've only done soft-realtime and disabling caches sounds crazy to me on anyth

• Jweb_Guru 10y ago
  Unless you can fit your entire application into faster RAM, you usually can't do SRAM only. And yes, it is crazy, but hard realtime is a whole different ballgame. Fortunately, your actual deadlines are usually pretty lenient, and you can often devote the core to a single task, so being slow isn't as big of a concern as you'd think. Another common thing you can do is maintain an SRAM scratchpad or two, sometimes with dedicated circuitry for handling the really latency-critical part, so you have full control over what goes in cache.
  • vvanders 10y ago
    Oy. That reminds me a bit of the SPUs on the PS3 where you had only 256kb of local memory and had to DMA everything in/out. How do you deal with MMUs? Do you just manually map each DRAM bank to a specific task and not even try to share them?
    • Jweb_Guru 10y ago
      > How do you deal with MMUs? Do you just manually map each DRAM bank to a specific task and not even try to share them? Pretty much.
      • vvanders 10y ago
        Oh man, fun times. Thanks for the insight, seems like an interesting space. I've done the 8-bit micros which are somewhat hard-realtime but never something at a larger scale.