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What era of chip layout was this? I'm surprised that manual chip layout was still being done when chip features were that small. I look at 1970s chips a lot, an
by kens 10y ago
What era of chip layout was this? I'm surprised that manual chip layout was still being done when chip features were that small. I look at 1970s chips a lot, and the features are easily visible under a microscope, as they are much larger than wavelength-sized.
- lisper 10y agoThis was in 1984, and it was for experimental chips, not production chips. The layout was done using CAD tools, but the placement was all manual. Also, I think they were analog chips, not digital. I'm not sure. This was a co-op job in my first year at college at the IBM plant on Cottle Road, and I was never fully in touch with the big picture. I think they were making big-ass hard drives, and the chips I was working on were part of the circuitry that amplified the raw signal from the read-write head, but those details were way above my pay grade.
- NegativeLatency 10y agoHow many features were on the chip?
- lisper 10y agoI have no idea. This was more than 30 years ago. But the number of transistors was in the hundreds or maybe low thousands. (I can't recall if I was laying out individual transistors or functional modules.)
- ci5er 10y agoAt Motorola, in MCU, they (we?) were still doing some manual layout (not much, but still...) on 8-bit and 16-bit core products as late as 1989. Of course, none of the more advanced CPUs or soon-to-come DSPs did. IF I recall correctly (and I probably don't), depending on the fab, for those parts, we were at or around 1micron at the time. It was an MCU, which many might call a SoC these days, but with all the timers and serial i/o and the A/D and D/A converters and PWMs - the 8-bit family (HC11) was probably around 50K transistors in an 80-pin QFP. The HC11 had a 6809(enhanced) core. I think the 6809 was ~9K transistors, but I seem to recall that ours was a bit bigger than that. Still ~3/4 of the die was "not-CPU".