If you're doing this in assembly, no problem so long as you understand the memory model of the cpu architecture you're targeting. The memory model implemented

If you're doing this in assembly, no problem so long as you understand the memory model of the cpu architecture you're targeting. The memory model implemented by c compilers absolutely do not allow this. The problem is not cache coherency but optimization. The compiler assumes it understands the visibility of the variables and reorders, combines, and eliminates reads and writes. C is not a high-level assembler. > A safer bet would be to use __atomic_load ... C11 atomics These should work but be careful. Use the semantics defined by these constructs not the semantics of any assembly you might imagine the compiler generating.