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The GPU => CPU memory bus is a major bottleneck for NVIDIA's growing Deep Neural Net driven adoption. GPUs churn through data once it is across the bus. A hei
by deepnet 10y ago
The GPU => CPU memory bus is a major bottleneck for NVIDIA's growing Deep Neural Net driven adoption.
GPUs churn through data once it is across the bus.
A heirarchy of GPUs, outputs wired to inputs, mirroring the heirarchy of deep nets would be useful for real time robots & cars, NVIDIA's other big market.
- creshal 10y ago> heirarchy of GPUs, outputs wired to inputs Nvidia introduced a new, faster SLI bridge for the new 1000 generation, aren't they used in GPGPU setups?
- michael_h 10y agoYou just use the PCI bus. GPUDirect gives you DMA access to the other GPUs on the same bus. If they're in PCI express x16 slots, it's relatively speedy.
- creshal 10y ago16 GByte/second sounds fast, but it's less than the bandwidth of dual channel DDR2 RAM. Never mind modern GDDR5X/DDR4/HBM memory.
- jensnockert 10y agoThe SLI bridge is quite slow though, even the updated SLI bridge is just 2GB/s.
- creshal 10y agoOuch, I'd have expected more.
- jsheard 10y ago> A heirarchy of GPUs, outputs wired to inputs, mirroring the heirarchy of deep nets would be useful for real time robots & cars, NVIDIA's other big market. Isn't that exactly what they're doing with NVLink? https://devblogs.nvidia.com/parallelforall/inside-pascal https://devblogs.nvidia.com/parallelforall/inside-pascal (NVLink High Speed Interconnect section)