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So curious what the other hardware is/does. Dan Luu wrote that Intel's cache allocation tech particularly helped Google, so they could run multiple workloads o
by twotwotwo 10y ago
So curious what the other hardware is/does.
Dan Luu wrote that Intel's cache allocation tech particularly helped Google, so they could run multiple workloads on one machine without totally trashing the larger caches at every context switch: http://danluu.com/intel-cat/ http://danluu.com/intel-cat/
The Xeon D chips, which provide cheap low-clocked big cores and integrated NICs for small servers, were requested by Facebook: https://code.facebook.com/posts/1711485769063510/facebook-s-new-front-end-server-design-delivers-on-performance-without-sucking-up-power/ https://code.facebook.com/posts/1711485769063510/facebook-s-...
Someone who follows server chips (maybe AnandTech?) called Xeon D's one of Intel's coolest product lines to come out recently. They're also arguably a smart way for Intel to seal off the lower end of the market against approaches with tons of cheap ARM or AMD cores.
- iheartmemcache 10y agoThe Zeptobars[1] team and/or Chris Tarnovsky/Travis Goodspeed/Bunnie Huang/et al are probably better equipped for reverse engineering hidden functionality. Anandtech's analyses is great, don't get me wrong, when provided with the proper ISA/datasheets and then giving great critique on what implication feature foo chip bar when it's publically available, but I don't think they're the type of people who take red fuming nitric acid to get the epoxy off chips or are experienced enough in microscopy at the um,nm level to perform such analysis. [1] zeptobars.com/en/read/open-microchip-asic-what-inside-II-msp430-pic-z80