> This is part 1/2 of a brief description/demo of a CPU I have designed in my spare time, and an OS which I have written for it. He claims to have designed his

> This is part 1/2 of a brief description/demo of a CPU I have designed in my spare time, and an OS which I have written for it. He claims to have designed his own CPU, not physically built it. VHDL/Verilog is the correct way to do it and an FPGA is the best way to actually run (as opposed to simulate) the hardware design. I don't see anything remotely misleading here.