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> For instance, the ARM lacks a leading zero count instruction Huh? ARM has this instruction (since v5, IIRC), it's spelled CLZ.
by stephencanon 10y ago
> For instance, the ARM lacks a leading zero count instruction
Huh? ARM has this instruction (since v5, IIRC), it's spelled CLZ.
- dewster 10y agoI've read that ARM Cortex-M0 and M0+ cores do not support it. Why on earth isn't it in all ARM cores?
- stephencanon 10y agoM0 is an extraordinarily stripped-down core. While I agree that it would be nice to have CLZ, if you are really missing it on an M0, you'd probably be better off with M3 or M4f.