4 ms·
> a computer capable of executing millions of instructions per second Billions, not millions.
by Tuna-Fish 17y ago
> a computer capable of executing millions of instructions per second
Billions, not millions.
- btilly 17y agoBillions of cycles per second. But executing an instruction frequently takes 20 cycles or so. That reduces instructions to hundreds of millions.
- jacoblyles 17y agoPresumably any modern processor would use some form of pipelining, which I think would take instructions back up into the billions. (The pentium 4, if I recall correctly, had a 20+ stage pipeline)
- gridspy 17y agoLong pipelines cause issues when branches get mis-predicted. The half processed instructions have to be thrown away. What you want is a CPU with a short pipeline, a fast clock rate and if possible instruction reordering and multiple dispatch. Large caches and good branch prediction help a lot too.
- bruceboughton 17y agoFrom CSS to processor design in just 5 comments! Only on HN ;)
- kscaldef 17y agoExcept that pipelining, multiple cores, and hyperthreading then bring it back up. So, let's not get overly pedantic here.
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- sp332 17y agoWell, it doesn't happen in real life, but an Intel i7 is capable of issuing 4 instructions per clock cycle (sometimes 5, with a little microcode cheating). A 3.2 GHz quad-core could issue 51.2 billion instructions per second.
- Tuna-Fish 17y agoThe core i7 can issue 4 instructions, and execute 6 micro-ops per cycle. As long as your code is not a single huge dependency chain, you are mostly reading data out of L1 cache, and you don't use complex instructions like division, you can expect to get at least 2 instructions per clock. I have profiled real code (crypto stuff) that got a tad bit over 3 instructions per cycle. That's 10 billion instructions a second on the processor it ran on. Most instructions have not taken over 2 cycles on x86 since P4. This is a mesofact, update your worldview. :)