5 ms·

Buckle Up, Intel Preps 8-Core Nehalem-EX Chips for March Launch

17 points by Flemlord 17y ago

lallysingh 17y ago
I don't have a use for a car, but a quad-socket machine may be pretty fun in terms of those "let the computer search for answers over the weekend" type problems.....
- jacquesm 17y ago
  If you do that just on the weekend that's an excellent use case for renting a bunch of boxes in the cloud. In fact, it's one of the few use cases for which the numbers really work out well.
ggruschow 17y ago
I should start publishing this news, since my source seems faster and more reliable, though a little hard to understand. I get an email at least a few hours before the announcement that reads "Your new absolute-top-of-the-line-hardware has shipped. Tracking number YC23JK." While I don't think it's technically illegal, I do find it strange that the manufacturers are allowed to collude to insure I personally overspend by at least 20% and never have top-of-the-line hardware for more than a month. I've come to accept that I'll never know how they picked me, but I'd still really like to know how they get my email passwords. I think it'll work the other way too: A cheap way for hardware manufacturers to make their deadline is to ship me their current generation a couple weeks before they need to ship the next generation junk.
- gjm11 17y ago
  The canonical solution to this problem is not to buy absolute top-of-the-line hardware; it's seldom good value for money. (Yeah, I know, sometimes you just gotta have the best. But still.)
  - hga 17y ago
    I've generally found myself satisfied by looking at a price-performance graph and buying the processor just before the knee. Sure, I'd like more CPU, but up to now more memory and disk have been the better tradeoffs. Especially memory: there are some things that just aren't practical when your working set gets too large (e.g. you start constantly paging), whereas a somewhat slower CPU just requires a bit of patience for what I do (which isn't number crunching or anything else that keeps my CPU pegged). All that said, the next major machine I build should be in 2011-12 and I'm really looking forward to having bunch of cores with more cache than, say, the 16MB of RAM I bought in 1991 for my 486 Windows machine. As it is now, wouldn't it be hard to buy "normal" CPU that doesn't have at least as much cache as the address space of a PDP-10 (18 bits of 36 bits words, or a megabyte of 9 bit bytes)? And cache has become the new RAM, RAM the new disk, and disk the new tape. Wild times for someone who started out with punched card FORTRAN on an IBM 1130 (64KB max, more likely a lot less, 1-10 MB disk, probably closer to the former).
MikeCapone 17y ago
I'd love to have a few of these babies to crunch for Rosetta@home.
djcapelis 17y ago
Neat, but wow look at the bus on that thing! Is Intel still using a basic crossbar for an interconnect? When are they going to roll out their new interconnect technologies? (They clearly must be working on them... they know just as well as the rest of us do that the on-chip network they have now isn't going to scale.) These appear to be still built on the old 45nm process. It should be interesting to see what the 32nm westmere shrink look like. (The ones out so far are mostly only dual cores. They plan to do the rest of the line later in the year...)
- wmf 17y ago
  Actually, this is the first Intel chip with a ring bus.
  - djcapelis 17y ago
    Ah, interesting. I assume there's multiple rings though, one can't really be satisfied with a 1x-4x difference in contacting other cores? (Assuming bidirectional.) Also rings still don't scale, so they're really going to have to get more clever. I wonder what the perf hit for the ring is going to be.
    - Andys 17y ago
      http://www.theregister.co.uk/2009/11/16/sgi_altix_uv_preview/ http://www.theregister.co.uk/2009/11/16/sgi_altix_uv_preview...
      - djcapelis 17y ago
        That's an off-chip interconnect, we're talking about on-chip interconnects. 8 cores is probably pushing the limits of Intel's current on-chip network. One option is to move closer (but probably not actually adopt) something like a scalar operand network used on some of the tile architectures.
        sparky 17y ago
sketerpot 17y ago
I remember when 24 MB was a respectable size for a hard drive. Now we've got CPU caches that big. It's downright ridiculous.
- Andys 17y ago
  CPU caches will soon be big enough, and flash fast enough, that there won't be any system RAM anymore. Your programs will basically run directly out of flash, and made performant thanks to huge CPU cache.
  - djcapelis 17y ago
    That's just not going to end up true for a general system. For some embedded systems that's a possibility, but the type of write wear system RAM gets is very different than the type of write wear hard drives get. A few people had visions of this, but any engineer who's run the numbers and looked at the trends in flash technology knows it's extremely unlikely that flash will replace RAM before it eats dust because of minimum theoretical densities. STTRAM[1] might be capable of this when it comes online and in production, but it seems flash is unlikely to reach this point and STTRAM is still in development. [1] http://en.wikipedia.org/wiki/Spin_torque_transfer http://en.wikipedia.org/wiki/Spin_torque_transfer
- djcapelis 17y ago
  For comparison: POWER6 is 32mb. Large caches are becoming one of the largest performance wins on processors as I/O bottlenecks become more severe. By all good estimates it's only maybe 4-10 years before we have to worry about straight up running out of pins on the chips. (We can put more cores in 'em, but we actually will have a really hard time scaling down the pins that connect the die to the rest of the computer, so this will be another I/O bottleneck. The die is going to need as much cache as we can give it.)
patrickgzill 17y ago
The economics of virtualization certainly point to this being a hit. A 2U chassis with 64GB of RAM or so could easily replace half a rack of slower systems (add some flash drives to speed up IO if needed).

17 points by Flemlord 17y ago

I don't have a use for a car, but a quad-socket machine may be pretty fun in terms of those "let the computer search for answers over the weekend" type problems.....

jacquesm 17y ago
If you do that just on the weekend that's an excellent use case for renting a bunch of boxes in the cloud. In fact, it's one of the few use cases for which the numbers really work out well.

ggruschow 17y ago

I should start publishing this news, since my source seems faster and more reliable, though a little hard to understand. I get an email at least a few hours before the announcement that reads "Your new absolute-top-of-the-line-hardware has shipped. Tracking number YC23JK." While I don't think it's technically illegal, I do find it strange that the manufacturers are allowed to collude to insure I personally overspend by at least 20% and never have top-of-the-line hardware for more than a month. I've come to accept that I'll never know how they picked me, but I'd still really like to know how they get my email passwords. I think it'll work the other way too: A cheap way for hardware manufacturers to make their deadline is to ship me their current generation a couple weeks before they need to ship the next generation junk.

gjm11 17y ago
The canonical solution to this problem is not to buy absolute top-of-the-line hardware; it's seldom good value for money. (Yeah, I know, sometimes you just gotta have the best. But still.)
- hga 17y ago
  I've generally found myself satisfied by looking at a price-performance graph and buying the processor just before the knee. Sure, I'd like more CPU, but up to now more memory and disk have been the better tradeoffs. Especially memory: there are some things that just aren't practical when your working set gets too large (e.g. you start constantly paging), whereas a somewhat slower CPU just requires a bit of patience for what I do (which isn't number crunching or anything else that keeps my CPU pegged). All that said, the next major machine I build should be in 2011-12 and I'm really looking forward to having bunch of cores with more cache than, say, the 16MB of RAM I bought in 1991 for my 486 Windows machine. As it is now, wouldn't it be hard to buy "normal" CPU that doesn't have at least as much cache as the address space of a PDP-10 (18 bits of 36 bits words, or a megabyte of 9 bit bytes)? And cache has become the new RAM, RAM the new disk, and disk the new tape. Wild times for someone who started out with punched card FORTRAN on an IBM 1130 (64KB max, more likely a lot less, 1-10 MB disk, probably closer to the former).

MikeCapone 17y ago

I'd love to have a few of these babies to crunch for Rosetta@home.

djcapelis 17y ago

Neat, but wow look at the bus on that thing! Is Intel still using a basic crossbar for an interconnect? When are they going to roll out their new interconnect technologies? (They clearly must be working on them... they know just as well as the rest of us do that the on-chip network they have now isn't going to scale.) These appear to be still built on the old 45nm process. It should be interesting to see what the 32nm westmere shrink look like. (The ones out so far are mostly only dual cores. They plan to do the rest of the line later in the year...)

wmf 17y ago
Actually, this is the first Intel chip with a ring bus.
- djcapelis 17y ago
  Ah, interesting. I assume there's multiple rings though, one can't really be satisfied with a 1x-4x difference in contacting other cores? (Assuming bidirectional.) Also rings still don't scale, so they're really going to have to get more clever. I wonder what the perf hit for the ring is going to be.
  - Andys 17y ago
    http://www.theregister.co.uk/2009/11/16/sgi_altix_uv_preview/ http://www.theregister.co.uk/2009/11/16/sgi_altix_uv_preview...
    - djcapelis 17y ago
      That's an off-chip interconnect, we're talking about on-chip interconnects. 8 cores is probably pushing the limits of Intel's current on-chip network. One option is to move closer (but probably not actually adopt) something like a scalar operand network used on some of the tile architectures.
      - sparky 17y ago

sketerpot 17y ago

I remember when 24 MB was a respectable size for a hard drive. Now we've got CPU caches that big. It's downright ridiculous.

Andys 17y ago
CPU caches will soon be big enough, and flash fast enough, that there won't be any system RAM anymore. Your programs will basically run directly out of flash, and made performant thanks to huge CPU cache.
- djcapelis 17y ago
  That's just not going to end up true for a general system. For some embedded systems that's a possibility, but the type of write wear system RAM gets is very different than the type of write wear hard drives get. A few people had visions of this, but any engineer who's run the numbers and looked at the trends in flash technology knows it's extremely unlikely that flash will replace RAM before it eats dust because of minimum theoretical densities. STTRAM[1] might be capable of this when it comes online and in production, but it seems flash is unlikely to reach this point and STTRAM is still in development. [1] http://en.wikipedia.org/wiki/Spin_torque_transfer http://en.wikipedia.org/wiki/Spin_torque_transfer
djcapelis 17y ago
For comparison: POWER6 is 32mb. Large caches are becoming one of the largest performance wins on processors as I/O bottlenecks become more severe. By all good estimates it's only maybe 4-10 years before we have to worry about straight up running out of pins on the chips. (We can put more cores in 'em, but we actually will have a really hard time scaling down the pins that connect the die to the rest of the computer, so this will be another I/O bottleneck. The die is going to need as much cache as we can give it.)

patrickgzill 17y ago

The economics of virtualization certainly point to this being a hit. A 2U chassis with 64GB of RAM or so could easily replace half a rack of slower systems (add some flash drives to speed up IO if needed).