> quadruple-speed single precision execution and double-speed double precision FYI Xeon Phi supports AVX512, i.e. 512 bit SIMD registers (8 doubles or 16 float

> quadruple-speed single precision execution and double-speed double precision FYI Xeon Phi supports AVX512, i.e. 512 bit SIMD registers (8 doubles or 16 floats). In the consumer CPU world there is AVX2 which has 256 bit registers (4 doubles or 8 floats). AVX also has a 'fused multiply with add'(FMA) instruction which is useful for matrix multiplication amongst other things.