4 ms·

According to Google, the A9X has a memory bandwidth of 51.2GB/sec, whereas the Core i5 mentioned above, according to Intel, has a bandwidth of 34.1 GB/s. So wha

• ChuckMcM 10y ago
  No generally available access port to that memory. In the x86 world (for some chips) there is a proprietary bus called the "frontside bus" which connects the CPU to something called the north bridge. Other chips export the memory controller directly with some number of "physical" bits which will constrain the total number of DIMMS that can be connected to the system. ARM SoC's typically have a memory port that supports exactly one memory chip. So the most memory you will see on them is typically 2GB (32 bits x 512K) although from the Anandtech article on the A9x (http://www.anandtech.com/show/9824/more-on-apples-a9x-soc http://www.anandtech.com/show/9824/more-on-apples-a9x-soc) it seems to support 4GB. Looking at the iFixit teardown (https://www.ifixit.com/Teardown/iPad+Pro+12.9-Inch+Teardown/52599 https://www.ifixit.com/Teardown/iPad+Pro+12.9-Inch+Teardown/...) on the iPad Pro it has two LPDDR4 chips (SK Hynix H9HCNNNBTUMLNR-NLH). So that makes it one of the first I've seen that actually can take two chips. The issues generally are that they burn up a lot of pins and at the speeds the run signal integrity is really hard (for example all of the data and address PCB traces have to be the same length so the bits all arrive at the same time on the CPU side and the memory side!)