5 ms·

The end of exponential growth is inevitable. We've reached the end of Moore's law as it applies to silicon wafers. We may be able to get to 5nm but no one reall

The end of exponential growth is inevitable. We've reached the end of Moore's law as it applies to silicon wafers. We may be able to get to 5nm but no one really has an idea on how to do it and make a profit. Alternate technologies are just theoretical ideas that have no timeline for commercialization. The main point of the decline of Moore's law is that it is about economics as much as it is about the size of the features on a chip. Even if someone does figure out how to get to 5nm it may not be cost effective to mass produce chips at that size. Already we see that Intel can't afford to keep up with shrinking scale as they've moved away from their tick-tock cadence to tick-tock-tock. Intel has the most advanced materials research in the world and they can't make it work cost effectively. That indicates pretty clearly that the exponential scaling of transistors is over. Smaller transistors may still be possible or new materials may emerge but the future scaling isn't going to happen on Dr. Moore's timetable which is the basis for Moore's law.

bluetomcat 10y ago
> Even if someone does figure out how to get to 5nm it may not be cost effective to mass produce chips at that size. On top of that, it is not quite clear what would the hardware designers achieve with an increased transistor budget. CPU cores are becoming increasingly small in comparison to the surrounding circuitry (graphics, caches, control logic). We are bumped on clock speeds, too.
- thoughtsimple 10y ago
  Mostly lower power from what I understand. Do phones, tablets, and small laptops really need more than 4 cores? Probably not. So the only thing you get is lower power and maybe smaller chips (which can help with the economics).
  - paulddraper 10y ago
    If you only run one NodeJS app at a time, probably not
- DasIch 10y ago
  The obvious answer would be adding more CPU cores and surrounding circuitry. Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware.
  - eli_gottlieb 10y ago
    >Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware. Well that would seem to call for adding specialized coprocessors or even FPGA's, not just more CPU cores.
    - DasIch 10y ago
      I don't think AES or video decoding uses coprocessors or FPGAs, that's just implemented more or less like any other instruction. If you're going complete coprocessor, you can do much more like Apple has done with their motion coprocessors or the secure enclave.
- slededit 10y ago
  I do wish Intel would make a high TDP i7 with improved single thread performance. I would even be OK with a water cooler. The lack of progress on thread perf is a huge problem.
  - petra 10y ago
    There's a new laptop with a XEON processor: http://www.laptopmag.com/articles/lenovo-p-series-hands-on http://www.laptopmag.com/articles/lenovo-p-series-hands-on
    - slededit 10y ago
      If you look at the passmark thread performance charts E5 xeons are very low on the list: https://www.cpubenchmark.net/singleThread.html https://www.cpubenchmark.net/singleThread.html E3 xeons (which are essentially i7s with ECC) score higher; But if you care about single thread perf then you get an i7-4790k which has been top of the list since 2014. Zero progress has been made since then.
gene-h 10y ago
Applied Materials presented a roadmap on how we might get to 3 nm using disappointingly conventional semiconductor processing techniques[0]. In short, you make the transistors tall and thin. [0] https://web.archive.org/web/20130810001315/http://www.semiconwest.org/sites/semiconwest.org/files/docs/SW2013_Adam%20Brand_Applied%20Materials.pdf https://web.archive.org/web/20130810001315/http://www.semico...
- thoughtsimple 10y ago
  Maybe. Most of the presentation is beyond my knowledge level. But the 10nm & 7nm design is showing using a III-V FinFET. As far as I know, no one has that working yet. And as far as I can tell, this doesn't talk much about lithography. Multi patterning is reportedly going to be problem at 10nm and lower and EUV isn't ready yet either.

bluetomcat 10y ago

> Even if someone does figure out how to get to 5nm it may not be cost effective to mass produce chips at that size. On top of that, it is not quite clear what would the hardware designers achieve with an increased transistor budget. CPU cores are becoming increasingly small in comparison to the surrounding circuitry (graphics, caches, control logic). We are bumped on clock speeds, too.

thoughtsimple 10y ago
Mostly lower power from what I understand. Do phones, tablets, and small laptops really need more than 4 cores? Probably not. So the only thing you get is lower power and maybe smaller chips (which can help with the economics).
- paulddraper 10y ago
  If you only run one NodeJS app at a time, probably not
DasIch 10y ago
The obvious answer would be adding more CPU cores and surrounding circuitry. Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware.
- eli_gottlieb 10y ago
  >Especially on mobile it probably also makes a lot of sense to move more algorithms from software to hardware. Well that would seem to call for adding specialized coprocessors or even FPGA's, not just more CPU cores.
  - DasIch 10y ago
    I don't think AES or video decoding uses coprocessors or FPGAs, that's just implemented more or less like any other instruction. If you're going complete coprocessor, you can do much more like Apple has done with their motion coprocessors or the secure enclave.
slededit 10y ago
I do wish Intel would make a high TDP i7 with improved single thread performance. I would even be OK with a water cooler. The lack of progress on thread perf is a huge problem.
- petra 10y ago
  There's a new laptop with a XEON processor: http://www.laptopmag.com/articles/lenovo-p-series-hands-on http://www.laptopmag.com/articles/lenovo-p-series-hands-on
  - slededit 10y ago
    If you look at the passmark thread performance charts E5 xeons are very low on the list: https://www.cpubenchmark.net/singleThread.html https://www.cpubenchmark.net/singleThread.html E3 xeons (which are essentially i7s with ECC) score higher; But if you care about single thread perf then you get an i7-4790k which has been top of the list since 2014. Zero progress has been made since then.

gene-h 10y ago

Applied Materials presented a roadmap on how we might get to 3 nm using disappointingly conventional semiconductor processing techniques[0]. In short, you make the transistors tall and thin. [0] https://web.archive.org/web/20130810001315/http://www.semiconwest.org/sites/semiconwest.org/files/docs/SW2013_Adam%20Brand_Applied%20Materials.pdf https://web.archive.org/web/20130810001315/http://www.semico...

thoughtsimple 10y ago
Maybe. Most of the presentation is beyond my knowledge level. But the 10nm & 7nm design is showing using a III-V FinFET. As far as I know, no one has that working yet. And as far as I can tell, this doesn't talk much about lithography. Multi patterning is reportedly going to be problem at 10nm and lower and EUV isn't ready yet either.