7 ms·

Adapteva has done chips for <$2M AFAIK, definitely <$5M, at 28 nm. Of course few chips are like theirs in terms of design simplicity relatively to their large s

by _yosefk 10y ago

Adapteva has done chips for <$2M AFAIK, definitely <$5M, at 28 nm. Of course few chips are like theirs in terms of design simplicity relatively to their large size except for bitcoin miners. For $10M however you should be able to do pretty big designs with lots of licensed IP, heavyweight simulation acceleration etc. A breakdown of real projects involves violating NDAs. Below 28nm their numbers become really deranged. This overstatement is IMO peddled by big name chip companies trying to convince analysts that FinFET nodes give them a moat. In reality the end of Moore's law means they'll face vicious competition. Of course nothing prevents you from spending huge amounts of money. Buy an ARM architecture license - there goes $30M and that's before you pay for developing your own ARM-compatible CPU.

adapteva 10y ago
Yosefk, thanks for pitching in and fighting the complete bs that gets flung around regarding chip design costs. Some of these projections are just ludicrous, clearly made by people who are not currently involved in chip design. For argument's sake, let's pin the tapeout cost at $5M and EDA costs at $1M. Everything else is engineering. The reason these projects are expensive is that the chips are complex (because the have 10B transistors!). It has nothing to do with technology scaling (except for the fact that smaller nodes lets you integrate more transistors). I can design a memory chip (with repeating structures) in any node for almost nothing (..besides the tapeout cost). If they would have costs have escalated from $50K at to $5M at 14nm, that would be reasonable. The $250M number is utter nonsense.... Some more background: http://www.adapteva.com/andreas-blog/semiconductor-economics-101/ http://www.adapteva.com/andreas-blog/semiconductor-economics...
- nickpsecurity 10y ago
  The other comment to yosefk is mine citing your Lean Fabless article to contradict the point you just made slightly. Feel free to clarify on that if I'm misinterpreting something. Yet again, your next link supports "ludicrous" prices if it's a complex, full-featured SOC along lines of Apple products. Perhaps they should put qualifiers in these articles to be clear they're talking about high-end stuff with big numbers of parts and engineering required. If they even know what they're talking about. Yet, two of your articles suggest me doing a Snapdragon or something without buying third-party I.P. or RTL could easily cost the numbers in the article on 28nm. Or the other nm. Intended audience of those big nodes will also mostly be companies making stuff like that where they can afford development costs. Do shuttleruns even exist for 16/14nm?
nickpsecurity 10y ago
You're talking about this: http://www.adapteva.com/andreas-blog/a-lean-fabless-semiconductor-startup-model/ http://www.adapteva.com/andreas-blog/a-lean-fabless-semicond... Adapteva is pretty clever. Yet, they don't tell us whether they reached $2 million at the 16-core model with 64 costing much more or if that was both. The write-up also says they used third party I.P.. It implies they outsourced as much stuff as possible. You can bet it was mostly standard cell rather than custom in those. They used the shuttle runs I often advocate which are available on their chosen nodes. Biggest part, they recovered this by selling to niche markets that didn't care much about price. Try that in mass market outside being Apple you will fail. All quite different than doing a whole SOC by yourself on 28nm. They even admitted complex SOC's can cost big money: "Complicated SOCs are indeed very expensive to develop and there are few if any examples of complete products that have cost less than $10M from start to finish. " So, now we've shifted from $2mil to $10mil that quickly. Gotta wonder what in-house development of full SOC a la Snapdragon with bells and whistles at 28nm costs with only packaging or PCB's outsourced. Is it maybe $10-30 million? ;)
- adapteva 10y ago
  We can't tell you the detailed costs because this would violate our NDAs, but until our 2011 28nm tapeout, we had raised less than $2.5M in capital and taped out 4 chips at 65 and 28nm. There is no mystery here. EDA costs, tapeouts, engineering costs are all known. Tell me the chip you want to build, I'll tell you how much it will cost.:-) People seem to have a hard time grasping that the term "SOC" is meaningless when it comes to predicting cost. It's like comparing the cost of a Ford Focus and a Ferrari. Sure they are both cars...
  - nickpsecurity 10y ago
    Thanks for the clarification. That's hopeful. I just gave you a sample question on cost in another comment. Even a range will be helpful when soliciting academics on it.
    - adapteva 10y ago

by _yosefk 10y ago

adapteva 10y ago

Yosefk, thanks for pitching in and fighting the complete bs that gets flung around regarding chip design costs. Some of these projections are just ludicrous, clearly made by people who are not currently involved in chip design. For argument's sake, let's pin the tapeout cost at $5M and EDA costs at $1M. Everything else is engineering. The reason these projects are expensive is that the chips are complex (because the have 10B transistors!). It has nothing to do with technology scaling (except for the fact that smaller nodes lets you integrate more transistors). I can design a memory chip (with repeating structures) in any node for almost nothing (..besides the tapeout cost). If they would have costs have escalated from $50K at to $5M at 14nm, that would be reasonable. The $250M number is utter nonsense.... Some more background: http://www.adapteva.com/andreas-blog/semiconductor-economics-101/ http://www.adapteva.com/andreas-blog/semiconductor-economics...

nickpsecurity 10y ago
The other comment to yosefk is mine citing your Lean Fabless article to contradict the point you just made slightly. Feel free to clarify on that if I'm misinterpreting something. Yet again, your next link supports "ludicrous" prices if it's a complex, full-featured SOC along lines of Apple products. Perhaps they should put qualifiers in these articles to be clear they're talking about high-end stuff with big numbers of parts and engineering required. If they even know what they're talking about. Yet, two of your articles suggest me doing a Snapdragon or something without buying third-party I.P. or RTL could easily cost the numbers in the article on 28nm. Or the other nm. Intended audience of those big nodes will also mostly be companies making stuff like that where they can afford development costs. Do shuttleruns even exist for 16/14nm?

nickpsecurity 10y ago

You're talking about this: http://www.adapteva.com/andreas-blog/a-lean-fabless-semiconductor-startup-model/ http://www.adapteva.com/andreas-blog/a-lean-fabless-semicond... Adapteva is pretty clever. Yet, they don't tell us whether they reached $2 million at the 16-core model with 64 costing much more or if that was both. The write-up also says they used third party I.P.. It implies they outsourced as much stuff as possible. You can bet it was mostly standard cell rather than custom in those. They used the shuttle runs I often advocate which are available on their chosen nodes. Biggest part, they recovered this by selling to niche markets that didn't care much about price. Try that in mass market outside being Apple you will fail. All quite different than doing a whole SOC by yourself on 28nm. They even admitted complex SOC's can cost big money: "Complicated SOCs are indeed very expensive to develop and there are few if any examples of complete products that have cost less than $10M from start to finish. " So, now we've shifted from $2mil to $10mil that quickly. Gotta wonder what in-house development of full SOC a la Snapdragon with bells and whistles at 28nm costs with only packaging or PCB's outsourced. Is it maybe $10-30 million? ;)

adapteva 10y ago
We can't tell you the detailed costs because this would violate our NDAs, but until our 2011 28nm tapeout, we had raised less than $2.5M in capital and taped out 4 chips at 65 and 28nm. There is no mystery here. EDA costs, tapeouts, engineering costs are all known. Tell me the chip you want to build, I'll tell you how much it will cost.:-) People seem to have a hard time grasping that the term "SOC" is meaningless when it comes to predicting cost. It's like comparing the cost of a Ford Focus and a Ferrari. Sure they are both cars...
- nickpsecurity 10y ago
  Thanks for the clarification. That's hopeful. I just gave you a sample question on cost in another comment. Even a range will be helpful when soliciting academics on it.
  - adapteva 10y ago