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What you are saying is PRECISELY why Moore Law ended with 7nm. Mind you, performance improvements didn't ended, we can still find other ways to do things... B
by speeder 11y ago
What you are saying is PRECISELY why Moore Law ended with 7nm.
Mind you, performance improvements didn't ended, we can still find other ways to do things...
But 7nm is the smallest physically possible transistor (well, theoretically it is 5nm, but that one can't be actually manufactured).
So, you hit 5nm, then what? Your only choice would be make chips larger... but if you do that, you limit your maximum clock (example: a 5cm processor, if it allowed data to travel at light speed, and had perfect cooling, would still be limited to 6ghz)
Or make them taller, but then you can't cool them easily.
That is the problem, Moore Law, as in transistors per chip, ended with 7nm, there is nowhere to go after that, the only thing you can do is add more chips and make them communicate with each other (ie: multi-cpu... see what AMD has been doing in their recent research, trying to figure how to make an API to allow infinite amount of GPUs in the same calculation in a way 100% transparent to the developer).
But making more chips is not improving Moore's Law.
The only thing that can be done now, is invent something else, silicon transistors are done for, you can't improve them much anymore, you can only change the tech (use something else other than silicon transistors) or find novel ways to use current silicon tech (better architectures, multi-chip systems, better code, etc...)
- logicallee 11y ago>Or make them taller, but then you can't cool them easily. Haven't you answered your own question? Your other points are about impossibility - the one I just quoted, about making chips taller, is about difficulty. If I were the head of Intel I would say "Well. Hmmm. All right. I guess we'd better start making them taller." Moore's law is not a question of "how hard can it be". As you've pointed out, on the current approach it's a question of "It is physically impossible for us to increase transistor count without dropping the clock rate or moving out of roughly a plane. No thanks to Einstein. (My favorite link on this subject: https://www.google.com/search?q=c+%2F+4+ghz https://www.google.com/search?q=c+%2F+4+ghz ) You say "Or make them taller, but then you can't cool them easily." Well then, make them taller and cool them with difficulty. Nobody said it would be easy. Off-hand you could: -> Immerse the taller chip in insane cooling -> Fabricate little duct work between layers and liquid cool at high velocity -> Figure out a way to reduce heat waste usage, e.g.: different substrate, not silicon (pretty insane) -> Possibly combining some of the above points, make it a superconductor. These are insane ideas from me. But then again, I'm not the head of Intel and you've heard a few minutes of thought on me on this topic, where I'm not a chip designer. "When you have eliminated the impossible, whatever remains, however [difficult], is your [roadmap.]"
- NegativeK 11y agoWithout getting into semantics, Moore's Law roughly assumes that things will get cheaper or you'll get significantly greater bang for your buck. "Nobody said it would be easy" is a casual dismissal of the fact that consumers won't pay for this, unless someone conjures a materials revolution. And no, we can't just assume the head of Intel will conjure up a materials revolution solely to adhere to an industry observational law.
- logicallee 11y agoI don't know, man: https://en.wikipedia.org/wiki/Moore's_law#Moore.27s_second_law https://en.wikipedia.org/wiki/Moore's_law#Moore.27s_second_l... This talks about an exponential increase in R&D costs which is expected by Moore. With stuff like cloud computing, I don't see the need for denser and denser CPU's going away any time soon.
- thesz 11y agoI've seen electronic microscope image of a working polar transistor in few dozens of atoms. Wires were couple atoms wide. The method employed for that scale was able to place about couple of hundreds of tungsten atoms per second. It was in 2005. I lost contact with these people, I don't know how they do now.
- SemiTom 11y agoIntel has a roadmap down to 3nm, and I believe Imec does, as well. But the future is probably a combination of different packaging with faster interconnects and better throughput to and from a variety of memory types. There are a couple of ways to drop the heat. One is a different transistor structure, which may allow for a sharp reduction in voltage (0.1 or 0.2 volts vs. 0.7 to 3.5V). The second way is to use silicon photonics between chips in a package, which is coming one of these days.
- im3w1l 11y ago> a 5cm processor, if it allowed data to travel at light speed, Easy. Just have multiple synchronized clock sources.
- deleted 11y ago[deleted]