The idea of a single bit flip in an instruction fetch is very real. Imagine an instruction encoding where your intended load op becomes a store due to a single

The idea of a single bit flip in an instruction fetch is very real. Imagine an instruction encoding where your intended load op becomes a store due to a single bit flip and your system hangs waiting for a response that never comes. Obviously you should have used ECC on your instruction ram but that can have a bug impact on your design so maybe you skipped it...