5 ms·
An entirely different approach could be to make it more likely to crash to minimize the harmful effects of executing corrupt code. I don't know how these corru
by boomlinde 11y ago
An entirely different approach could be to make it more likely to crash to minimize the harmful effects of executing corrupt code.
I don't know how these corruptions manifest themselves, but if for example a single bit gets flipped every now and then somewhere (probably a naive assumption), a CPU that had a 0b11111111 nop instruction and 8 reset instructions at 0b01111111, 0b10111111, 0b11011111 etc., you could interleave your code with tons of nop instructions to minimize the possibility of executing corrupted code. You'd then be more likely to reset than to execute something that will lead to further corruption.
As for data, I like the idea of storing/reading it redundantly in 3 or 5 places and assume that the majority of a read to all of them (bit by bit) is correct and rewrite the supposedly corrupt data. Again, not sure how well a solution like this actually applies to radiation corruption. You can of course use any existing techniques for data error correction, like Hamming coding (used in for example teletext to correct errors).
- PhasmaFelis 11y ago> I don't know how these corruptions manifest themselves, but if for example a single bit gets flipped every now and then somewhere (probably a naive assumption), a CPU that had a 0b11111111 nop instruction and 8 reset instructions at 0b01111111, 0b10111111, 0b11011111 etc., you could interleave your code with tons of nop instructions to minimize the possibility of executing corrupted code. You'd then be more likely to reset than to execute something that will lead to further corruption. I like this. It's functional, yet wildly impractical.
- kingosticks 11y agoThe idea of a single bit flip in an instruction fetch is very real. Imagine an instruction encoding where your intended load op becomes a store due to a single bit flip and your system hangs waiting for a response that never comes. Obviously you should have used ECC on your instruction ram but that can have a bug impact on your design so maybe you skipped it...