> Well multi core is not one CORE but rather an integrated distributed system of cores linked with buses that are probably built with chips very similar to swit

> Well multi core is not one CORE but rather an integrated distributed system of cores linked with buses that are probably built with chips very similar to switch/commuters without all the KPEX poured in optimizing network equipments. Not really. Multi-core chips share processor execution resources and L2 cache between them. The on-die cores are directly tied to each other in a way that off-die components, including cores in another socket on the same board, are not. They are a single computer. Now, you can carry the network abstraction down to that level. Problem is, as an EE I can carry the network abstraction down below the register level. A register bit is a network of transistors and resistors, after all. At what point do we call something a computer? I personally think any clustering of tightly-coupled, on-die computational blocks is a "computer", which means the milti-core chips certainly count as one computer with multiple execution pipelines.