Came here to post this. The other advantage of cache over explicit control of the on-chip SRAM is that it allows code to be inherently forwards and backwards c

Came here to post this. The other advantage of cache over explicit control of the on-chip SRAM is that it allows code to be inherently forwards and backwards compatible, rather than tying the code to a specific machine with a specific amount of on-chip memory. And I imagine the nightmare would only increase if you had to factor multitasking into an explicit scheme. The primary benefit of explicit on-chip memory is not, AFAIK, that you can manually manage it significantly better than a cache, but that it takes up significantly less die space and has lower access latency. You really see this idea shine in tiny cheap microcontrollers that have no external memory.