3 ms·
The cache is a shared resource, so I'm not sure how you would propose to "handle it directly", other than literally having a MMU/virtual memory layer on top of
by newobj 10y ago
The cache is a shared resource, so I'm not sure how you would propose to "handle it directly", other than literally having a MMU/virtual memory layer on top of it, and try to provide some guarantees about coherence. But given how small it is, without allowing for hard pins, I suspect that the entire cache would be thrashed pretty badly across processes and it will just degrade back to what happens today; it's useful/coherent for short/co-located bursts and not much else.
- nulltype 10y agoWell imagine I could address memory on the CPU die like a register but say 1MB of memory, located right next to the normal place you put a cache. It does not have to be coherent I think. Process thrashing sounds like an issue though. I imagine if the address space is across all CPU cores then the software can pin to a core so that the access is local. Remote access to another CPU will be slow, but I'm not sure how great it is with caches anyway.