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The problem with having 100 x86 CPU on one board is NUMA becomes a bad problem. When memory accesses from one CPU to different regions of memory will have quite
by semi-extrinsic 11y ago
The problem with having 100 x86 CPU on one board is NUMA becomes a bad problem. When memory accesses from one CPU to different regions of memory will have quite different bandwidths and latencies, you're much better off by acknowledging that upfront, designing a proper interconnect (Infiniband), and not sharing memory between threads but rather communicating explicitly (MPI).
- CyberDildonics 11y agoThe next Xeon Phi has an Intel designed interconnect and a layer of 16GB high bandwidth memory between the main memory and the processor.