4 ms·
Verilator, which is also open source, is a much higher performance simulator, as it compiles Verilog to C++ first, rather than traditional simulation like Icaru
by pdq 11y ago
Verilator, which is also open source, is a much higher performance simulator, as it compiles Verilog to C++ first, rather than traditional simulation like Icarus.
http://www.veripool.org/wiki/verilator http://www.veripool.org/wiki/verilator
- blackguardx 11y agoBut Icarus is also a synthesizer. Does verilator do synthesis?
- zik 11y agoNo it doesn't. It translates the verilog source into C which it compiles to a native executable for simulation.
- buserror 11y agoOn a related note, ghdl [0] is a similar project but for VHDL. I spent a lot of time using it before I switched to verilog, it's a pretty nice tool on the other side of the fence. [0]: http://home.gna.org/ghdl/ http://home.gna.org/ghdl/
- FullyFunctional 11y agoOMG, verilator where have you been all my life? This makes a HUGE difference. Thanks for the pointer. EDIT: I should point out that I just tested it on some heavy workloads. One simulation that took 93.8 s only took 1.4 s with verilator.